The Microscopic Variation in Chip Manufacturing That Becomes the Source of a Security Key
To understand a PUF (Physically Unclonable Function), it helps to start with a single question.
"If two chips are built from the exact same design, on the exact same process, are they really identical on the inside?"
On the surface, it looks that way. Chips fabricated from the same design, on the same wafer, using the same process, end up with the same structure and the same function. But once you zoom in to the nanometer scale, the picture changes.
No matter how precisely a semiconductor fabrication process is controlled, it always produces tiny physical deviations — what the industry calls process variation. VIA PUFTM treats this microscopic variation not as a defect to be eliminated, but as a security resource that makes every chip's internal fingerprint different.
1. First, What Exactly Is a VIA?
A semiconductor chip is built from multiple stacked layers of metal wiring. Each metal layer carries signals and power like a wire, but connecting one layer to another electrically requires a vertical path between them.
That microscopic vertical structure connecting two different metal layers is called a VIA.
A simple way to picture it: if each floor's hallway in a multi-story building is a metal layer, a VIA is the stairwell or elevator shaft that connects one floor to the next.
In a typical chip, every VIA is expected to form reliably at its designed location and create a solid electrical connection. A VIA that fails to connect when it's supposed to is treated as a manufacturing defect.
VIA PUF™ turns that assumption on its head.
2. How Does a VIA Actually Get Formed?
Let's take a closer look at how a VIA comes into being.
Between two metal layers on a chip sits an insulating layer that normally blocks any electrical path. To connect two metal layers, engineers cut an extremely small opening through that insulating layer — a via hole — and fill it with a conductive material so current can flow between the layer above and the layer below.
Conceptually, the sequence looks like this:
Insulating layer deposited → via hole etched → conductive material fills the hole → the two metal layers become electrically connected
The real fabrication process is, of course, far more complex than this. What matters here is that a VIA, just like every other structure on a chip, isn't simply a line from a design file appearing in reality — it's built through a series of delicate physical process steps.
And it is precisely in that sequence of steps that process variation creeps in.
Even when every via is drawn with the same size and shape, zooming in to the nanometer level reveals that no two of them turn out perfectly identical.
In ordinary chip design, engineers build in enough process margin to make sure this variation never threatens the connection — because, after all, the entire purpose of a via is to connect.
VIA PUF™ looks at that same variation from a different angle.
3. Turning the Manufacturing 'Difference' Into Something Useful
Semiconductor fabrication is remarkably precise, but making every single structure on every single chip physically identical is simply not realistic.
Across the many steps of the process — exposure, etching, deposition, and more — nanometer-scale differences arise naturally and unavoidably.
In most chip designs, the goal is to minimize and tightly control that difference.
VIA PUF™ asks a different question instead:
"If this variation can never be fully eliminated, why not use it to tell each chip apart?"
VIA PUF™ draws on the microscopic physical differences that arise while a via hole is being formed.
The result is that each element making up a VIA PUF™ can end up in one of two distinct physical states: an electrically connected state or a disconnected state.
The key point is that this outcome isn't decided by software, and it isn't a case of someone pre-loading a 0 or a 1 before manufacturing even begins.
The physical variation that occurs while the chip is actually being manufactured is what determines the result.
That's why, even with an identical design, the physical outcome can differ from one chip to the next.
4. Why Does One VIA Connect While Another Doesn't?
To understand this, it helps to simplify the picture a little.
If a given structure sits comfortably within the conditions needed to connect, then even with some manufacturing variation, the outcome will almost always land on "connected."
If a structure sits well outside those conditions, the outcome will almost always land on "disconnected."
But in the narrow zone where the outcome could genuinely go either way, the story changes.
Here, even a tiny nanometer-scale process difference can be enough to tip the final physical state one way or the other.
Even with the identical design and the identical fabrication process, the instant the physical structure actually forms, a small difference is present. As a result, one location may end up connected while another, built to the same specification, ends up disconnected.
The crucial point is this: that outcome is genuinely difficult to predict in advance.
This isn't a case of the design itself being random.
The unpredictability comes from the physical variation that arises when one identical design is instantiated, again and again, into real silicon.
5. So Why Does 'About 50%' Matter So Much?
▲ PUF zone at 50% probability of Via or Contact formation (from ICTK VIA PUFTM Datasheet Brief)
There's a number that comes up again and again in any explanation of VIA PUF™.
About 50%.
It means that the outcome shouldn't lean heavily toward either connection or disconnection — the two states should appear in as close to a balanced split as possible.
Why does 50% matter so much?
A coin flip makes this easy to picture.
If a coin lands heads 90% of the time and tails only 10% of the time, you could guess "heads" every time without even looking at the result — and you'd be right far more often than not.
But if heads and tails are each exactly 50%, there's no way to guess which side is coming up next with any real confidence.
VIA PUF™ works on the same logic.
If most elements ended up "connected," you could reasonably guess "connected" before even checking the result. The same problem would exist if most elements ended up "disconnected."
But when connection and disconnection land close to a 50:50 split, there's no way to predict in advance which state any given element will settle into.
In other words, the point of 50% isn't to hit some perfectly exact half-and-half number. It's to keep the outcome from leaning toward either side, which is what keeps it unpredictable.
Information theory has a name for this kind of unpredictability: entropy.
When one outcome — a 0 or a 1 — shows up far more often than the other, entropy is low. The more evenly the two outcomes are balanced, the higher the entropy.
That's exactly why the "close to 50%" property matters so much for VIA PUF™.
6. If It's a '50% Probability,' Does the Value Keep Changing Every Time?
There's an easy misunderstanding to clear up here.
Saying "connection or disconnection is decided with roughly 50% probability" can sound like a VIA might connect one moment and disconnect the next, every time the chip powers on.
That's not what's happening.
The probability here describes something that happens before the chip is even manufactured — how difficult it is to predict, in advance, which physical state a given VIA will settle into.
Once the chip is actually fabricated and the physical state of each VIA is set, that outcome becomes a fixed, unique physical characteristic of that specific chip.
In short:
Hard to predict before manufacturing. A fixed physical trait of that chip after manufacturing.
This is a fundamentally different concept from generating a fresh random number on every use.
7. Same Design, Different Chips — So How Does Each One End Up With a Different Value?
Let's return to the question we started with.
"If two chips are built from the exact same design, are they really identical on the inside?"
The circuit's structure and function are identical, yes.
But what VIA PUF™ actually draws on isn't the design data itself — it's the microscopic physical variation that occurs when that design is instantiated into real silicon.
Imagine a chip with many VIA PUF™ elements.
If we represent each element's physical state as a 0 or a 1, one chip might produce a pattern like
1 0 1 1 0 0 1 0 …
while another chip, built from the exact same design, might produce
0 1 1 0 0 1 0 1 …
Each individual difference is minuscule. But once the outcomes of many elements are combined, the result is a distinct, unique pattern for every chip.
It's not unlike a human fingerprint.
The basic biological process that forms a fingerprint is the same for everyone, yet the tiny variations that accumulate along the way mean no two fingerprints ever come out alike.
VIA PUF™ works the same way, treating the microscopic physical variation created during semiconductor manufacturing as a kind of "silicon fingerprint."
8. If You Copy the Design, Can You Copy the PUF Too?
This is where another defining property of a PUF comes into view.
It's entirely possible to fabricate a new chip using the exact same circuit design and the exact same manufacturing process.
But what determines the uniqueness of a VIA PUF™ isn't a specific value written down anywhere in that design file.
It's the physical outcome that actually forms in each individual chip during manufacturing.
So even if you fabricate another chip from the identical design, reproducing the exact same physical pattern as the original chip is, for all practical purposes, not achievable.
In other words, knowing the design and actually reproducing the physical characteristics that formed in one specific chip are two entirely different problems.
That distinction is exactly what the name "Physically Unclonable Function" is meant to capture.
9. Turning a Manufacturing 'Flaw' Into a Source of Security
In conventional chip manufacturing, process variation is something to be minimized and tightly controlled.
VIA PUF™'s approach runs in the opposite direction.
It treats a microscopic physical difference that can never fully be eliminated as a security resource that gives every chip its own unique identity.
Here's the whole idea, laid out step by step:
① A VIA forms during semiconductor fabrication.
↓
② Nanometer-scale process variation naturally occurs during that fabrication.
↓
③ Depending on that variation, each VIA PUF™ element ends up in a different physical state.
↓
④ The combined pattern of connection and disconnection outcomes becomes a unique fingerprint for that chip.
↓
⑤ That physical uniqueness can serve as the foundation for Device Identity and a Cryptographic Key.
In the end, what VIA PUF™ draws on isn't some unique value that was injected from the outside.
It's the physical variation that arises from the very act of the chip being made.
Two chips, born from the same design, that never turn out perfectly identical. That small difference is what gives every chip its own uniqueness — and for VIA PUF™, that uniqueness becomes the starting point for hardware trust.
Frequently Asked Questions
Are a VIA and a via hole the same thing?
Not quite — it helps to keep the two concepts distinct. A via hole is the microscopic opening cut through the insulating layer to connect two different wiring layers. A VIA is the electrical connection between those layers that results once that hole is formed and filled.
Why does it matter that connection and disconnection land close to a 50:50 split?
When one outcome dominates, the result becomes somewhat predictable in advance. When the two outcomes are evenly balanced, predicting which state will form becomes far harder. A close-to-50:50 balance is what secures both high entropy and genuine unpredictability.
If it's a 50% probability, doesn't the PUF value keep changing?
No. The 50% here doesn't mean the state changes every time the chip is used. It describes how hard it is to predict, before manufacturing, which physical state a given VIA will settle into. Once that physical characteristic is set during fabrication, it becomes a fixed, unique property of that chip going forward.
If you fabricate a chip again from the same design, do you get the same PUF value?
No. VIA PUF™ doesn't rely on the design data itself — it relies on the microscopic physical variation that occurs during actual fabrication. So even chips built from an identical design will each form their own distinct physical pattern.
References
US Patent 10,423,067 B2, "Apparatus and method for generating physical unclonable function by modifying photo mask of semiconductor process" (ICTK Holdings Co., Ltd.)
GSA (Global Semiconductor Alliance), "Via PUF Technology as a Root of Trust in IoT Supply Chain"
Pappu, R. et al., "Physical One-Way Functions," Science, 2002
See How VIA PUF™ Works
Curious how VIA PUF™ becomes the starting point for hardware trust inside a real security chip?
☑️ Explore the VIA PUF™ Security IP
The Microscopic Variation in Chip Manufacturing That Becomes the Source of a Security Key
To understand a PUF (Physically Unclonable Function), it helps to start with a single question.
"If two chips are built from the exact same design, on the exact same process, are they really identical on the inside?"
On the surface, it looks that way. Chips fabricated from the same design, on the same wafer, using the same process, end up with the same structure and the same function. But once you zoom in to the nanometer scale, the picture changes.
No matter how precisely a semiconductor fabrication process is controlled, it always produces tiny physical deviations — what the industry calls process variation. VIA PUFTM treats this microscopic variation not as a defect to be eliminated, but as a security resource that makes every chip's internal fingerprint different.
1. First, What Exactly Is a VIA?
A semiconductor chip is built from multiple stacked layers of metal wiring. Each metal layer carries signals and power like a wire, but connecting one layer to another electrically requires a vertical path between them.
That microscopic vertical structure connecting two different metal layers is called a VIA.
A simple way to picture it: if each floor's hallway in a multi-story building is a metal layer, a VIA is the stairwell or elevator shaft that connects one floor to the next.
In a typical chip, every VIA is expected to form reliably at its designed location and create a solid electrical connection. A VIA that fails to connect when it's supposed to is treated as a manufacturing defect.
VIA PUF™ turns that assumption on its head.
2. How Does a VIA Actually Get Formed?
Let's take a closer look at how a VIA comes into being.
Between two metal layers on a chip sits an insulating layer that normally blocks any electrical path. To connect two metal layers, engineers cut an extremely small opening through that insulating layer — a via hole — and fill it with a conductive material so current can flow between the layer above and the layer below.
Conceptually, the sequence looks like this:
Insulating layer deposited → via hole etched → conductive material fills the hole → the two metal layers become electrically connected
The real fabrication process is, of course, far more complex than this. What matters here is that a VIA, just like every other structure on a chip, isn't simply a line from a design file appearing in reality — it's built through a series of delicate physical process steps.
And it is precisely in that sequence of steps that process variation creeps in.
Even when every via is drawn with the same size and shape, zooming in to the nanometer level reveals that no two of them turn out perfectly identical.
In ordinary chip design, engineers build in enough process margin to make sure this variation never threatens the connection — because, after all, the entire purpose of a via is to connect.
VIA PUF™ looks at that same variation from a different angle.
3. Turning the Manufacturing 'Difference' Into Something Useful
Semiconductor fabrication is remarkably precise, but making every single structure on every single chip physically identical is simply not realistic.
Across the many steps of the process — exposure, etching, deposition, and more — nanometer-scale differences arise naturally and unavoidably.
In most chip designs, the goal is to minimize and tightly control that difference.
VIA PUF™ asks a different question instead:
"If this variation can never be fully eliminated, why not use it to tell each chip apart?"
VIA PUF™ draws on the microscopic physical differences that arise while a via hole is being formed.
The result is that each element making up a VIA PUF™ can end up in one of two distinct physical states: an electrically connected state or a disconnected state.
The key point is that this outcome isn't decided by software, and it isn't a case of someone pre-loading a
0or a1before manufacturing even begins.The physical variation that occurs while the chip is actually being manufactured is what determines the result.
That's why, even with an identical design, the physical outcome can differ from one chip to the next.
4. Why Does One VIA Connect While Another Doesn't?
To understand this, it helps to simplify the picture a little.
If a given structure sits comfortably within the conditions needed to connect, then even with some manufacturing variation, the outcome will almost always land on "connected."
If a structure sits well outside those conditions, the outcome will almost always land on "disconnected."
But in the narrow zone where the outcome could genuinely go either way, the story changes.
Here, even a tiny nanometer-scale process difference can be enough to tip the final physical state one way or the other.
Even with the identical design and the identical fabrication process, the instant the physical structure actually forms, a small difference is present. As a result, one location may end up connected while another, built to the same specification, ends up disconnected.
The crucial point is this: that outcome is genuinely difficult to predict in advance.
This isn't a case of the design itself being random.
The unpredictability comes from the physical variation that arises when one identical design is instantiated, again and again, into real silicon.
5. So Why Does 'About 50%' Matter So Much?
▲ PUF zone at 50% probability of Via or Contact formation (from ICTK VIA PUFTM Datasheet Brief)
There's a number that comes up again and again in any explanation of VIA PUF™.
About 50%.
It means that the outcome shouldn't lean heavily toward either connection or disconnection — the two states should appear in as close to a balanced split as possible.
Why does 50% matter so much?
A coin flip makes this easy to picture.
If a coin lands heads 90% of the time and tails only 10% of the time, you could guess "heads" every time without even looking at the result — and you'd be right far more often than not.
But if heads and tails are each exactly 50%, there's no way to guess which side is coming up next with any real confidence.
VIA PUF™ works on the same logic.
If most elements ended up "connected," you could reasonably guess "connected" before even checking the result. The same problem would exist if most elements ended up "disconnected."
But when connection and disconnection land close to a 50:50 split, there's no way to predict in advance which state any given element will settle into.
In other words, the point of 50% isn't to hit some perfectly exact half-and-half number. It's to keep the outcome from leaning toward either side, which is what keeps it unpredictable.
Information theory has a name for this kind of unpredictability: entropy.
When one outcome — a 0 or a 1 — shows up far more often than the other, entropy is low. The more evenly the two outcomes are balanced, the higher the entropy.
That's exactly why the "close to 50%" property matters so much for VIA PUF™.
6. If It's a '50% Probability,' Does the Value Keep Changing Every Time?
There's an easy misunderstanding to clear up here.
Saying "connection or disconnection is decided with roughly 50% probability" can sound like a VIA might connect one moment and disconnect the next, every time the chip powers on.
That's not what's happening.
The probability here describes something that happens before the chip is even manufactured — how difficult it is to predict, in advance, which physical state a given VIA will settle into.
Once the chip is actually fabricated and the physical state of each VIA is set, that outcome becomes a fixed, unique physical characteristic of that specific chip.
In short:
Hard to predict before manufacturing. A fixed physical trait of that chip after manufacturing.
This is a fundamentally different concept from generating a fresh random number on every use.
7. Same Design, Different Chips — So How Does Each One End Up With a Different Value?
Let's return to the question we started with.
"If two chips are built from the exact same design, are they really identical on the inside?"
The circuit's structure and function are identical, yes.
But what VIA PUF™ actually draws on isn't the design data itself — it's the microscopic physical variation that occurs when that design is instantiated into real silicon.
Imagine a chip with many VIA PUF™ elements.
If we represent each element's physical state as a
0or a1, one chip might produce a pattern like1 0 1 1 0 0 1 0 …while another chip, built from the exact same design, might produce
0 1 1 0 0 1 0 1 …Each individual difference is minuscule. But once the outcomes of many elements are combined, the result is a distinct, unique pattern for every chip.
It's not unlike a human fingerprint.
The basic biological process that forms a fingerprint is the same for everyone, yet the tiny variations that accumulate along the way mean no two fingerprints ever come out alike.
VIA PUF™ works the same way, treating the microscopic physical variation created during semiconductor manufacturing as a kind of "silicon fingerprint."
8. If You Copy the Design, Can You Copy the PUF Too?
This is where another defining property of a PUF comes into view.
It's entirely possible to fabricate a new chip using the exact same circuit design and the exact same manufacturing process.
But what determines the uniqueness of a VIA PUF™ isn't a specific value written down anywhere in that design file.
It's the physical outcome that actually forms in each individual chip during manufacturing.
So even if you fabricate another chip from the identical design, reproducing the exact same physical pattern as the original chip is, for all practical purposes, not achievable.
In other words, knowing the design and actually reproducing the physical characteristics that formed in one specific chip are two entirely different problems.
That distinction is exactly what the name "Physically Unclonable Function" is meant to capture.
9. Turning a Manufacturing 'Flaw' Into a Source of Security
In conventional chip manufacturing, process variation is something to be minimized and tightly controlled.
VIA PUF™'s approach runs in the opposite direction.
It treats a microscopic physical difference that can never fully be eliminated as a security resource that gives every chip its own unique identity.
Here's the whole idea, laid out step by step:
① A VIA forms during semiconductor fabrication.
↓
② Nanometer-scale process variation naturally occurs during that fabrication.
↓
③ Depending on that variation, each VIA PUF™ element ends up in a different physical state.
↓
④ The combined pattern of connection and disconnection outcomes becomes a unique fingerprint for that chip.
↓
⑤ That physical uniqueness can serve as the foundation for Device Identity and a Cryptographic Key.
In the end, what VIA PUF™ draws on isn't some unique value that was injected from the outside.
It's the physical variation that arises from the very act of the chip being made.
Two chips, born from the same design, that never turn out perfectly identical. That small difference is what gives every chip its own uniqueness — and for VIA PUF™, that uniqueness becomes the starting point for hardware trust.
Frequently Asked Questions
Are a VIA and a via hole the same thing?
Not quite — it helps to keep the two concepts distinct. A via hole is the microscopic opening cut through the insulating layer to connect two different wiring layers. A VIA is the electrical connection between those layers that results once that hole is formed and filled.
Why does it matter that connection and disconnection land close to a 50:50 split?
When one outcome dominates, the result becomes somewhat predictable in advance. When the two outcomes are evenly balanced, predicting which state will form becomes far harder. A close-to-50:50 balance is what secures both high entropy and genuine unpredictability.
If it's a 50% probability, doesn't the PUF value keep changing?
No. The 50% here doesn't mean the state changes every time the chip is used. It describes how hard it is to predict, before manufacturing, which physical state a given VIA will settle into. Once that physical characteristic is set during fabrication, it becomes a fixed, unique property of that chip going forward.
If you fabricate a chip again from the same design, do you get the same PUF value?
No. VIA PUF™ doesn't rely on the design data itself — it relies on the microscopic physical variation that occurs during actual fabrication. So even chips built from an identical design will each form their own distinct physical pattern.
References
US Patent 10,423,067 B2, "Apparatus and method for generating physical unclonable function by modifying photo mask of semiconductor process" (ICTK Holdings Co., Ltd.)
GSA (Global Semiconductor Alliance), "Via PUF Technology as a Root of Trust in IoT Supply Chain"
Pappu, R. et al., "Physical One-Way Functions," Science, 2002
See How VIA PUF™ Works
Curious how VIA PUF™ becomes the starting point for hardware trust inside a real security chip?
☑️ Explore the VIA PUF™ Security IP